SDD3RMM=0, ACENDM=0, SDD3INM=0, SDCDRMM=0, RSPENDM=0, SDCDINM=0
SD_INFO1 Interrupt Mask Register
RSPENDM | Response End Interrupt Request Mask 0 (0): Response end interrupt request is not masked 1 (1): Response end interrupt request is masked |
Reserved | This bit is read as 0. The write value should be 0. |
ACENDM | Access End Interrupt Request Mask 0 (0): Access end interrupt request is not masked 1 (1): Access end interrupt request is masked |
SDCDRMM | SDnCD card Removal Interrupt Request Mask 0 (0): Card removal interrupt request by the by the SDnCD is not masked 1 (1): Card removal interrupt request by the by the SDnCD is masked |
SDCDINM | SDnCD card Insertion Interrupt Request Mask 0 (0): Card insertion interrupt request by the SDnCD is not masked 1 (1): Card insertion interrupt request by the SDnCD is masked |
Reserved | These bits are read as 000. The write value should be 000. |
SDD3RMM | SDnDAT3 Card Removal Interrupt Request Mask 0 (0): SD card removal interrupt request by the SDnDAT3 is not masked 1 (1): SD card removal interrupt request by the SDnDAT3 is masked |
SDD3INM | SDnDAT3 Card Insertion Interrupt Request Mask 0 (0): SD card insertion interrupt request by the SDnDAT3 is not masked 1 (1): SD card insertion interrupt request by the SDnDAT3 is masked |
Reserved | These bits are read as 000000. The write value should be 000000. |
Reserved | These bits are read as 0000000000000000. The write value should be 0000000000000000. |